Partial bitstream protection for low-cost FPGAs with physical unclonable function, obfuscation, and dynamic partial self reconfiguration - ScienceDirect
White Papers - PUF Cafe | The Global PUF Community
Figure 2 from FPGA PUF using programmable delay lines | Semantic Scholar
The new prototype implementation of a primitive PUF on Xilinx Zynq-7000... | Download Scientific Diagram
Schematic representation of a single Butterfly PUF cell on an FPGA | Download Scientific Diagram
Various types of FPGA-compatible PUF architectures | Download Scientific Diagram
fpga - IOB error while designing arbiter puf - Electrical Engineering Stack Exchange
Microsemi builds PUF into PolarFire FPGAs
Embedded SRAM security for IP protection in Intel FPGAs ...
SRAM PUF en FPGA con mejoras en seguridad - diarioelectronicohoy.com
FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures - ScienceDirect
Artix FPGA Target Board (CW305) - NewAE Technology | Mouser
Toshiba Develops Mutual Authentication Technology for IoT Devices by PUF Fingerprinting Using Variations in Semiconductor Chips | Corporate Research & Development Center | Toshiba
FPGA based delay PUF implementation for security applications | Semantic Scholar
A Design of Ring Oscillator Based PUF on FPGA | Semantic Scholar
Apollo - Intrinsic ID | Home of PUF Technology
An Experimental Study of the State-of-the-Art PUFs Implemented on FPGAs
Yohei HORI's Web Site - Profile
Novel hybrid strong and weak PUF design based on FPGA
A PUF-FSM Binding Scheme for FPGA IP PROTECTION
Cross-PUF Attacks: Targeting FPGA Implementation of Arbiter-PUFs | SpringerLink
Concealable physically unclonable function chip with a memristor array | Science Advances
PolarFire™ Non-Volatile FPGA Family Delivers Ground Breaking Value: Best-In-Class Security « Microsemi
A New Arbiter PUF for Enhancing Unpredictability on FPGA
Multi-mode PUF used for FPGA firmware Trojan detection Conclusion A new... | Download Scientific Diagram
